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F75133
F75133S
LOADING GAUGE IC
Release Date: July, 2007 Version: V0.28P
July, 2007 V0.28P
F75133
F75133 Datasheet Revision History
Version V0.23P V0.24P V0.25P V0.26P V0.27P V0.28P Date 2005 18/04/2005 26/07/2005 24/01/2006 20/12/2006 06/07/2007 Page 11 1 Revision History Release Version Added Un-Hysteresis Function Modified Hysteresis Mode Application. Modified CR04 bit4 Description. Add Patent Note. Company readdress
Please note that all data and specifications are subject to change without notice. All the trade marks of products and companies mentioned in this data sheet belong to their respective owners.
LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Fintek for any damages resulting from such improper use or sales.
July, 2007 V0.28P
F75133 Table of Content
1. 2. 3. 4. 5. 6. 7. 8. 9. 10. 11. 12. 13. General Description ........................................................................................................................1 Feature List .....................................................................................................................................1 Key Specification............................................................................................................................1 Pin Configuration............................................................................................................................2 Application Block Diagram ............................................................................................................2 Pin Description................................................................................................................................3 Function Description.......................................................................................................................3 Register Description......................................................................................................................10 Test Mode Setting .........................................................................................................................18 DC Characteristics ........................................................................................................................18 Ordering Information ....................................................................................................................19 Package Dimensions .....................................................................................................................20 Application Circuit........................................................................................................................21
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1. General Description
The F75133S is a "Loading Gauge IC". Loading detection and current monitor are the major applications of the F75133S. The F75133S is following the PWM signal change of duty cycle to react related functions for user application. For instance, the F75133S can be used to sense CPU loading for FAN speed control to cool down the temperature of CPU surface. It also can be used to implement Over/Under-Clocking and Over/Under-Voltage (Vcore) with higher performance/Lower power consumption. Anyway, the F75133S can be implemented by user differential application. In the past, if engineer would like to measure the parts consumption. He could connect a resistance between power and parts, and then they detected V and capitalized the value to understand the loading condition. Although the method is convenient and needs just a cheap resistance, but some of the accuracy issues and power consumption problem will be the critical points. For example, the resistance will cause more consumption and heat questions if the end-equipment needs mass current to implement. Depends on these problems, more accuracy and more efficiency sensor chip is necessary. The F75133S will handle previous trouble. The F75133S supports automatic PWM duty cycle detection, follows the result of detection to issue TURBO#B FAULT# and PME# signals for end-application, provides I2C interface for communication, the programmable Cycle-Length of detection rise the measurement accuracy. The F75133S is packaged in 8-pin SOP and powered by 3.3V.
2. Feature List
Automatic PWM Duty Cycle Detect Follows the Result of Detection to Issue TURBO#B FAULT# and PME# Signals for End-application Programmable Cycle-Length of Detection for Flexible Use and Accuracy 4 Steps 5 Stages Over-Clocking Machine Un-Hysteresis Function for CPU Over/Under-Clocking/Voltage Implementation Internal Oscillator for System Implement. 2-Wire I2C Interface 3.3V operation voltage. 8-pin SOP package.
3. Key Specification
Supply Voltage Operating Supply Current Noted: Patented TWI235553 3.0V to 3.6V 2 mA typ.
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4. Pin Configuration
5. Application Block Diagram
VIN Power Supply
PWM Buffer
CPU
CLK Gen.
Loading Gauge IC F75133S
Turbo Signal for Over-Clocking Signal for Over-Voltage VEN
VIDIN
VID Controller
VIDOUT
Application Block Diagram
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6. Pin Description
I/OD12st O12 OD12 INst P - TTL level bi-directional pin with schmitt trigger., Open-drain outpu with 12 mA sink capability. . .. - Output pin with 12 mA source-sink capability. - Open-drain output pin with 12 mA sink capability. - TTL level input pin with schmitt trigger. - Power.
Pin No 1 2 3 4 5 VDD SDA SCL VSS
Pin Name
Type P
PWR VDD VDD VDD
Description Main power supply voltage input with 3.3V. Serial data input/output. (5V Tolerance) Serial clock input. (5V Tolerance) Ground. General TURBO signal output pin. (5V Tolerance) Power on strapping pin. (5V Tolerance)
I/OD12st INst
P
TURBO#/STRAP
O12
6 7 8
FAULT# PME# PWMIN
OD12 OD12 INst
VDD VDD VDD
General FAULT event pin. (5V Tolerance) General PME event pin. (5V Tolerance) PWM input sensor pin. (5V Tolerance)
7. Function Description
7.1 General Description
As the below circuit, the F75133S can directly sense PWM controller's duty cycle to find out the current loading of equipments. In the past, if engineer would like to measure the consumption of parts, could put a resistance between power and parts, then detected V and capitalized the value to understand the loading condition. Although the method is convenient and needs just a cheap resistance, but some of the accurate issues and power consumption problem will be the critical points. For example, the resistance will cause more consumption and heat questions if the end-equipment needs mass current to implement. Depends on these problems, more accuracy and more efficiency sensor chip is necessary. The F75133S will handle previous trouble. 2007 V0.28P
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F75133
VIN Power Supply
PWM Buffer
Loading Gauge IC F75133S
The signal of PWM controller is as below illustration. When the end-equipment works steady, the electric current I, voltage V, Loading status and PWM signal (ex. Duty cycle = 50%) are stable simultaneously during ts. If now the loading of equipment increases at Ta point. The duty cycle of PWM signal will automatic adjust the duty cycle (ex Duty cycle = 90%) for controlling the external switch MOS to stabilize V to original position. And the voltage V will resume to pre-value after Tb point duration. In the same reason, the duty cycle of PWM signal will return to 50%. In this case can easy to recognize the relationship between Loading and PWM signal. The F75133S can capitalize the duty cycle of PWM to find out the equipment loading, and the F75133S also decreases the power consumption issues and solves heat problem.
Loading Status
Ta
Tb
I Vout
T PWM Signal
(Ugate)
ts t0 t1 t2 t3 t4 t5
In detail applications, F75133S provides 16bits-resolution sensor to detect the PWM duty cycle and supports 12bits-resolution engine for related limitation setting. User can decide monitor cycle via register setting (default value is about 0.554 Sec). Besides, the F75133S product can be used to calculate multiple phases loading value by 1, 2, 3 or 4 phases. Otherwise, user can select different application from F75133S as TURBO Mode, TURBO_SEL 0 Mode and TURBO_SEL 1 Mode. As much as these features, the F75133S also provides special -42007 V0.28P
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PME#/TURBO# Pin Mode output for particular usages.
7.2 PME# pin function
As the description as above, there are some functions on each pin of different mode. On PME# pin, there are six options in PME Multiple Function and PME Special modes. The sketch shows as below. User can choose one of those PME functions by register if you need. For instance, if user choose PME#(1) function, PME# pin will issue negative pulse when the loading over anyone of the limits. (More detail, please refer the register description).
PME Multiple Function:
Limit 3 Over high Limit 2
Limit 1
Limit 0 PME#(I) Pulse PME# (II)(100Hz/ 50Hz) PME# (III)(100Hz/ 50Hz) PME# (IV)(100Hz/ 50Hz) PME# (V)(100Hz/ 50Hz)
150u Sec
PME Special mode:
Limit 3
Limit 2
Limit 1 Limit 0
PME# 150uSec 1Hz
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7.3 TURBO# pin function
As same as the PME# pin, there are five options in Turbo normal function and Turbo multiple function modes. The sketch shows as below. (More detail, please refer the register description).
Turbo normal function:
Limit 3 Over high Limit 2
Limit1 Under low Limit 0
default TURBO#_SEL TURBO_SEL= 1 TURBO_SEL= 0
Turbo multiple function:
Limit 3
Limit 2
Limit 1
Limit 0
TURBO#(1) (100Hz/ 50Hz) TURBO#(2) (100Hz/ 50Hz) TURBO#(3) (100Hz/ 50Hz)
7.4 Fault# pin function
As same as above, there are several options in Turbo normal function and Turbo multiple function modes. -62007 V0.28P
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The sketch shows as below. (More detail, please refer the register description).
Fault normal function:
Limit 3
Limit 2
Limit 1
Limit 0
Default FAULT#
Fault LED mode function:
Limit 3
Limit 2
Limit 1
Limit 0 FAULT#
7.5 Turbo mode pin PME and pin TURBO function
In Turbo mode, the PME#/TRUBO# pins will be TURBO1/TURBO0 pins for CLK Gen. over-clocking usage. User can couple these two pins to CLK Gen. to implement performance. If user chooses this mode, there are four steps and five stages for different frequency use for over-clocking or under-clocking. (More detail, please refer the register description).
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00
Limit 3
01
Limit 2
10
Limit 1
11
Limit 0
00
PME#
TUBO0 #
7.6 Un-Hysteresis function
The Un-Hysteresis function shows as below sketch. This function mainly remove the loading gap from the Over-Voltage implementation. If user would like to Over-Voltage and Over-Clocking synchronous, must take care the gap effect in your system. As the sketch shows, system can't return if there is no Un-Hysteresis function. (More detail, please refer the register description).
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8. Register Description
8.1 Control Register Index 00h
Bit 7 INIT Name R/W Default R/W R/W R/W R/W 0 0 0 100 Description Soft ware reset device, if write 1 to this bit will reset this IC and then it will auto clear to 0. Reserved Set to 1 the output clock frequency will select to 50HZ, the default frequency is 100HZ. User can select clock duty cycle from CR06 bit 7~4 Set these bits to decide how many time to be one monitor cycle, and after one cycle finish, it will auto update average duty to PWM duty register (CR02). 000: (About 8.858 Sec) 001: (About 4.429 Sec) 010: (About 2.215 Sec) 011: (About 1.107 Sec) 100: (About 0.554 Sec) (Default value) 101: (About 0.277 Sec) 110: (About 0.138 Sec) 111: (About 0.069 Sec) 0 POWER_DOWN R/W 0 Set to 1 to stop PWM duty monitor and power down this IC.
6-5 Reserved. 4 CLK_SEL
3-1 MONITOR_TIME
8.2 Pins Control Register Index 01h
Bit 7 6 5 Name INV_TURBO INV_FAULT INV_PME R/W Default R/W R/W R/W 0 0 0 Description If set this bit to1, invert TURBO# pin output polarity. If set this bit to1, invert FAULT# pin output polarity. If set this bit to1, invert PME# pin output polarity.
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4 TURBO_MODE R/W
0 TURBO_MODE: If set bit4 to 1, will be in TURBO_MODE. PWM_DUTY(CR02, 08) > LIMIT3_VAL(CR03, 0A): DIS_LIMIT3_VAL set to 0 (CR0D bit1): DIS_LIMIT3_VAL set to 1 (CR0D bit1): PME#, TURBO# PME#, TURBO# 2'b00. 2'b01.
LIMIT3_VAL (CR03, 0A) > PWM_DUTY(CR02, 08) > LIMIT2_VAL (CR04, 0B): PME#, TURBO# 2'b01.
LIMIT2_VAL (CR04, 0B) > PWM_DUTY(CR02, 08) > LIMIT1_VAL (CR05, 0B): PME#, TURBO# 2'b10.
LIMIT1_VAL (CR05, 0B) > PWM_DUTY(CR02, 08)> LIMIT0_VAL (CR09, 0A) PME#, TURBO# 2'b11.
LIMIT0_VAL (CR09, 0A) > PWM_DUTY (CR02, 08) DIS_LIMIT0_VAL set to 0 (CR0D bit0): DIS_LIMIT0_VAL set to 1 (CR0D bit0): PME#, TURBO# PME#, TURBO# 2'b00. 2'b11.
3
TURBO_SEL
R/W
0
If TURBO_SEL (bit3) set to 0 and TURBO_MODE (bit4) is 0, will be in "Under LIMIT1 Mode". 1. When PWM_DUTY (CR02, CR08) value is under then LIMIT1_VAL (CR05, CR0B), the TURBO# pin will be asserted 2. The PME# pin will be asserted when PWM_DUTY (CR02, CR08) value over (under) or return to normal value ( as the figure), and the PME_STS (CR06 bit 3) bit will be set to 1, users need write 1 to PME_STS (CR06 bit 3) to clear it, else PME# will not be asserted again. If TURBO_SEL (bit3) set to 1 and TURBO_MODE (bit4) is 0, will be in "Over LIMIT2 Mode". 1. When PWM_DUTY (CR02, CR08) value is over then LIMIT2 (CR04, CR0B), the TURBO# pin will be asserted 2. The PME# pin will be asserted when PWM_DUTY (CR02, CR08) value over (under) or return to normal value, and the PME_STS (CR06 bit 3) bit will be set to 1, users need write 1 to PME_STS (CR06 bit 3) else PME# will not be asserted again. to clear it,
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HYS_MODE1 enable(CR0D bit3 set to 1) If TURBO_SEL (bit3) set to 0 and TURBO_MODE (bit4) is 0, will be in "Over Clocking Mode". 1. When PWM_DUTY (CR02, CR08) value is over then LIMIT1_VAL (CR05, CR0B), the TURBO# pin will be asserted after PWM_DUTY (CR02, CR08) value is under LIMIT2_VAL(CR04, CR0B), or LIMIT1_VAL (CR05, CR0B), the TURBO# pin will be return.
If TURBO_SEL (bit3) set to 1 and TURBO_MODE(bit4) is 0, will be in "Power save Mode". 1. When PWM_DUTY (CR02, CR08) value is under then LIMIT2_VAL (CR04, CR0B), the TURBO# pin will be asserted after PWM_DUTY (CR02, CR08) value is over then LIMIT1_VAL(CR05, CR0B), or LIMIT2_VAL (CR04, CR0B), the TURBO# pin will be return. 2 1 EN_TURBO EN_FAULT R/W R/W 0 1 Set to 1 to enable TURBO# function. Set to 1 to enable FAULT# function, when PWM_DUTY (CR02, CR08) value is over then LIMIT3_VAL (CR03, CR0A), the FAULT# pin will be asserted (low active) in TURBO_MODE. Set to 1 to enable PME# function, when PWM_DUTY (CR02, CR08) value over or under then any LIMIT_VAL value, the PME# pin will be asserted.
0
EN_PME
R/W
0
8.3 PWM Duty Count Register (MSB) Index 02h
Bit Name R/W Default R 00h Description Average duty cycle count. Divide this count value to 256 is duty cycle.
7-0 PWM_DUTY[15:8]
8.4 LIMIT3 Value Register (MSB) Index 03h
Bit Name R/W Default R/W Description Duty cycle count LIMIT3, if average duty count over this value will assert FAULT function. The default value of this is Strapping by TURBO# pin : Pull-down 4.7K: default value F3h (95%) and now I2C ID is 66h. Pull-up 100k: default value E6h (90%) and now I2C ID is 68h. Pull-down 100K: default value CCh (80%) and now I2C ID is 6Ah. Pull-up 4.7k: default value B3h (70%) and now I2C ID is 6Ch.
7-0 LIMIT3_VAL[11:4]
8.5 LIMIT2 Value Register (MSB) Index 04h
Bit Name R/W Default Description
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7-0 LIMIT2_VAL[11:4] R/W 3Ch Duty cycle count LIMIT2, if average duty count over this value and TURBO_SEL is 1, then it will assert TURBO# pin.
8.6 LIMIT1 Value Register (MSB) Index 05h
Bit Name R/W Default R/W 0Fh Description Duty cycle count LIMIT1, if average duty count under this value and TURBO_SEL is 0, then it will assert TURBO# pin.
7-0 LIMIT1_VAL[11:4]
8.7 Event Status Register Index 06h
Bit Name R/W Default R/W 4'h4 Description When CR00H bit4 set to 0, the pin TURBO# will output 100Hz clock, and users can use these registers to program the output duty cycle, (default is 50%) For example: 0: 10% duty cycle. 1: 20% duty cycle. 2: 30% duty cycle. .................... 8: 90% duty cycle. 9: 100% duty cycle. (always high) 10~15: reserved. 3 PME_STS R/W 0 When Duty cycle value (PWM_DUTY) over (under) or return to normal value, it will trigger PME# and set this bit to 1. Users need write 1 to clear it, else PME# will not be asserted again. 1. PWM duty cycle value (PWM_DUTY) over LIMIT3 count (CR03, CR0A) and DIS_LIMIT3 set to 0(CR0D), this bit will set to 1, else will auto return to 0. PWM duty cycle value (PWM_DUTY) under LIMIT0 count (CR09, CR0A) and DIS_LIMIT0 set to 0(CR0D), this bit will set to 1, else will auto return to 0
7-4 DUTY_SEL
2
OVER_UNDER_FAU LT
R
0
2.
1 0
OVER_HIGH UNDER_LOW
R R
0 0
PWM duty cycle value (PWM_DUTY) over LIMIT2 count (CR04, CR0B), this bit will set to 1, else will auto return to 0. PWM duty cycle value (PWM_DUTY) under LIMIT1 count (CR05, CR0B), this bit will set to 1, else will auto return to 0.
8.8 I2C_ADDRESS Register Index 07h
Bit 7-0 Name I2C_ADDR R/W Default R/W X Description Pull-down 4.7K: default I2C ID is 66h. In this strapping value the PWM input will be inverted. Pull-up 100K: default I2C ID is 68h. Pull-down 100k: default I2C ID is 6Ah. In this strapping value the PWM input will be inverted. Pull-up 4.7k: default I2C ID is 6Ch.
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8.9 PWM Duty Count Register(LSB) Index 08h
Bit 7-0 Name PWM_DUTY [7:0] R/W Default R X Description Average duty cycle count bit 7~0. Divide the PWM_DUTY [15:0] to 65536 is mean present duty cycle.
8.10
Bit
LIMIT0 Value Register (MSB) Index 09h
Name R/W Default R/W 0Dh Description Duty cycle count LIMIT0, if average duty count under this value will assert FAULT function. The default value of this is 8'h0D.
7-0 LIMIT0_VAL[11:4]
8.11
Bit
LIMIT0 and LIMIT3 Value Register (LSB) Index 0Ah
Name R/W Default RO R/W 0h 0h Description Duty cycle count LIMIT3, if average duty count over this value will assert FAULT function. The default value of this is Strapping by TURBO# pin: Duty cycle count LIMIT0, if average duty count over this value will assert FAULT function. The default value of this is Strapping by TURBO# pin :
7-4 LIMIT3_VAL[3:0] 3-0 LIMIT0_VAL[3:0]
8.12
Bit
LIMIT1 and LIMIT2 Value Register(LSB) Index 0Bh
Name R/W Default R/W R/W 0h 0h Description Duty cycle count LIMIT2, if average duty count over this value and TURBO_SEL is 1, then it will assert TURBO# pin. Duty cycle count LIMIT1, if average duty count under this value and TURBO_SEL is 0, then it will assert TURBO# pin.
7-4 LIMIT2_VAL[3:0] 3-0 LIMIT1_VAL[3:0]
8.13
Bit 7
Pin Mode Select Register Index 0Ch
Name R/W Default R/W 0 Description If PWM duty value over (under) LIMIT3( LIMIT0), and this bit set to 1 then the PME# pin will output 1HZ clock, else it will be the function that select in PME_MODE_SEL (CR0Cbit4-2). Reserved. Reserved.
PME_LEDMODE
6 5
Reserved Reserved
R/W R/W
0 0
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4-2 PME _PIN_SEL R/W 0h These registers use to select PME# pin clock output function. 000: PME# pin will use as normal function. 001: PME# pin will output 100HZ or 50HZ clock (select by CR00 bit4) 010: When PWM duty over LIMIT 2, PME# pin will output 100HZ or 50HZ clock. 011: When PWM duty under Limit1, PME# pin will output 100HZ or 50HZ clock 100~111: When PWM duty over or under LIMIT3/0, PME# pin will output 1HZ clock These registers use to select Turbo# pin clock output function. 00: Turbo pin will use as normal function. 01: Turbo pin will output 100HZ or 50HZ clock (select by CR00 bit4) 10: When PWM duty over LIMIT2, Turbo pin will output 100HZ or 50HZ clock. 11: When PWM duty under LIMIT1, Turbo pin will output 100HZ or 50HZ clock
1-0 TURBO_PIN_SEL
R/W
0h
8.14
Bit 5 4 3 2 1 0
Event and mode control Register Index 0Dh
Name R/W Default R0 R/W R/W R/W R/W R/W R/W 0 0 0 0 0 0 1 Always return 0. When this bit enable, pin Fault # will become input mode, and input low will disable turbo output. Set to 1 fault function will alert by LED mode. Hysteresis mode Reserved. (Do Not change the value) Set this bit to 1 to disable over LIMIT3 compare. Set this bit to 1 to disable under LIMIT0 compare. Description
7-6 Reserved FAULT_DIS_TURBO FAULT_LED HYS_MODE_EN Reserved DIS_LIMIT3_VAL DIS _LIMIT0_VAL
8.15
Bit 3 2 1 0
PME# Event Control Register Index 0Eh
Name R/W Default R0 R/W R/W R/W R/W 0 1 1 1 1 Always return 0. Enable over/under LIMIT3 event to trigger PME Enable over/under LIMIT2 event to trigger PME Enable over/under LIMIT1 event to trigger PME Enable over/under LIMIT0 event to trigger PME Description
7-4 Reserved LIMIT3_PME_EN LIMIT2_PME_EN LIMIT1_PME_EN LIMIT0_PME_EN
8.16
Bit 5
Watchdog timer Control Register Index 0Fh
Name R/W Default R0 R/W R/W 0 1 1Fh Always return 0. Timeout function enables. When HYS_MODE and PWM duty between LIMIT value and return value more then timeout count value times, it will disable turbo output. Description
7-6 Reserved TIMEOUT_EN 4-0 TIMOUT_CNT_VAL
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8.17
Bit
LIMIT3 Return Value Register (MSB) Index 13h
Name R/W Default R/W Xh Description When PWM duty over/under this value and HYS_MODE2 (CR0D bit3) is enabled turbo code[2:0] will return to last value.
7-0 RET_VAL3[11:4]
8.18
Bit
LIMIT2 Return Value Register (MSB) Index 14h
Name R/W Default R/W Xh Description When PWM duty over/under this value and HYS_MODE2 (CR0D bit3) is enabled turbo code[2:0] will return to last value
7-0 RET_VAL2 [11:4]
8.19
Bit
LIMIT1 Return Value Register (MSB) Index 15h
Name R/W Default R/W Xh Description When PWM duty over/under this value and HYS_MODE2 (CR0D bit3) is enabled turbo code[2:0] will return to last value
7-0 RET_VAL1 [11:4]
8.20
Bit
LIMIT0 Return Value Register (MSB) Index 19h
Name R/W Default R/W Xh Description When PWM duty over/under this value and HYS_MODE2 (CR0D bit3) is enabled turbo code[2:0] will return to last value
7-0 RET_VAL0[11:4]
8.21
Bit
LIMIT3 and LIMIT0 Return Value Register (LSB) Index 1Ah
Name R/W Default RO R/W Description
7-4 RET_VAL3[3:0] 3-0 RET_VAL0[3:0]
xxx0b When PWM duty over/under this value and HYS_MODE2 (CR0D bit3) is enabled turbo code[2:0] will return to last value xxx0b When PWM duty over/under this value and HYS_MODE2 (CR0D bit3) is enabled turbo code[2:0] will return to last value
8.22
Bit
LIMIT2 and LIMIT1 Return Value Register(LSB) Index 1Bh
Name R/W Default R/W R/W Description
7-4 RET_VAL2[3:0] 3-0 RET_VAL1[3:0]
xxx0b When PWM duty over/under this value and HYS_MODE2 (CR0D bit3) is enabled turbo code[2:0] will return to last value xxx0b When PWM duty over/under this value and HYS_MODE2 (CR0D bit3) is enabled turbo code[2:0] will return to last value
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8.23
Bit 7 6-4 CODE1 3 Reserved
Turbo code 0-1 Register(LSB) Index 1Ch
Name R/W Default RO R/W RO R/W 0 X 0 X Always return 0 Turbo code1[2:0] when PWM duty over LIMIT 0, Turbo code value will output from pin {FAULT#, PME#, TURBO#} Always return 0 Turbo code0[2:0] when PWM duty under LIMIT 0, Turbo code value will output from pin {FAULT#, PME#, TURBO#} Description
Reserved
2-0 CODE0
8.24
Bit 7
Turbo code 2-3 Register(LSB) Index 1Dh
Name R/W Default RO R/W RO R/W 0 X 0 X Always return 0 Turbo code3[2:0] when PWM duty over LIMIT 2, Turbo code value will output from pin {FAULT#, PME#, TURBO#} Always return 0 Turbo code2[2:0] when PWM duty over LIMIT 1, Turbo code value will output from pin {FAULT#, PME#, TURBO#} Description
Reserved
6-4 CODE3 3 Reserved
2-0 CODE2
8.25
Bit 7
Turbo code 4 and Standby code Register(LSB) Index 1Eh
Name R/W Default RO R/W 0 X Always return 0 Standby turbo code[2:0] when watchdog timer event happen or pin FAULT# input low (when FAULT_DIS_TURBO enable CR0D bit5) the output Turbo code will replace by this code. Always return 0 Turbo code4[2:0] when PWM duty over LIMIT 3. Turbo code value will output from pin {FAULT#, PME#, TURBO#} Description
Reserved
6-4 STANDBY_CODE
3
Reserved
RO R/W
0 X
2-0 CODE4
8.26
Bit
Chip ID Register (I) Index 5Ah
Name R/W Default R 04h Chip ID Description
7-0 CHIP_ID1
8.27
Bit
Chip ID Register(II) Index 5Bh
Name R/W Default R 02h Chip ID Description
7-0 CHIP_ID2
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8.28
Bit
VENDOR ID Register(I) Index 5Dh
Name R/W Default R 19h 19h for Fintek Description
7-0 VENDOR_ID1
8.29
Bit
VENDOR ID Register(II) Index 5Eh
Name R/W Default R 34h 34h for Fintek Description
7-0 VENDOR_ID2
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F75133 9. DC Characteristics
(Ta = 70 C, VDD = 3.3V, VSS = 0V) PARAMETER SYM. MIN. TYP. MAX. UNIT CONDITIONS
I/OD12st - TTL level bi-directional pin, with Schmitt trigger, can select to OD by register, with 12 mA source-sink capability Input Low Threshold Voltage Input High Threshold Voltage Output Low Current Input High Leakage Input Low Leakage VtVt+ IOL ILIH ILIL -1 2.0 12 1 0.8 V V mA A A VDD = 3.3 V VDD = 3.3 V VOL = 0.4 V VIN = VDD VIN = 0V
O12 - Output pin with 12 mA source-sink capability Output High Current Output Low Current IOH IOL 20 -20 mA mA VOL = 2.4 V VOL = 0.4 V
INst - TTL level , with Schmitt trigger input pin Input Low Threshold Voltage Input High Threshold Voltage Input High Leakage Input Low Leakage VtVt+ ILIH ILIL -1 2.0 1 0.8 V V A A VDD = 3.3 V VDD = 3.3 V VIN = VDD VIN = 0V
OD12 - Open drain output pin with 12 mA source-sink capability. Output Low Current IOL 12 mA VOL = 0.4 V
10. Ordering Information
Part Number F75133S Package Type 8-SOP Green Package Production Flow Commercial, 0C to +70C
-19-
2007 V0.28P
F75133 11. Package Dimensions
8pin-SOP ( 150 mil)
8
5
c
E
HE
L
1
D
4
0.25 O
A Y SEATING PLANE b e A1 GAUGE PLANE
Control demensio are in mileters .
SYMBOL A A1 b c E D e HE Y L DIMENSION IN MM MIN. MAX. 1.35 1.75 0.10 0.25 0.51 0.33 0.19 0.25 3.80 4.00 4.80 5.00 1.27 BSC 6.20 5.80 0.10 0.40 1.27 0 10 DIMENSION IN INCH MIN. MAX. 0.053 0.069 0.010 0.004 0.020 0.013 0.010 0.008 0.157 0.150 0.188 0.196 0.050 BSC 0.228 0.016 0 0.244 0.004 0.050 10
Feature Integration Technology Inc.
Headquarters 3F-7, No 36, Tai Yuan St., Chupei City, Hsinchu, Taiwan 302, R.O.C. TEL : 886-3-5600168 FAX : 886-3-5600166 www: http://www.fintek.com.tw Taipei Office Bldg. K4, 7F, No.700, Chung Cheng Rd., Chungho City, Taipei, Taiwan 235, R.O.C. TEL : 866-2-8227-8027 FAX : 866-2-8227-8037
Please note that all datasheet and specifications are subject to change without notice. All the trade marks of products and companies mentioned in this datasheet belong to their respective owner
-202007 V0.28P
F75133S 12. Application Circuit
VCC3V
VCC3V C1 0.1u SDA SCL
EU1 VDD 1 2 3 4 VDD SDA SCL VSS PWMIN PME# FAULT# TURBO# F75133S 8 7 6 5 PWM_Control_phase
R1 R2 R3 4.7K 4.7K 4.7K
CLK_Turbo#
21

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